Published: 03rd December 2019
This IIT Hyd device can alert doctors about heart diseases by monitoring ECG data in real-time
The device, which consumes less power, can alert doctors and patients about the risk of cardiovascular disease (CVD) by monitoring ECG Data in real-time and prevent mortalities
Researchers from the Indian Institute of Technology Hyderabad (IIT Hyderabad) have developed a low-power device that can monitor electrocardiogram (ECG) and alert patients and doctors in real-time about the risk of cardiovascular diseases (CVD). CVD tops the list of public health concern compared to other diseases and has almost become the primary cause of human deaths, as per a survey of the World Health Organisation (WHO). The main causes include changings trend in lifestyle, unhealthy eating habits, tobacco usage, low fruit and vegetable intake and lack of physical activity and lot of stress. These factors necessitate developing a personalised CVD monitoring device powered by battery backup and with a very low form factor to achieve unobtrusiveness that works under the emerging cyber-physical system setup.
The research was conducted by a team comprising Vemishetty Naresh (PhD, Research Scholar, Advanced Embedded Systems and IC Design Laboratory, Department of Electrical Engineering), IIT Hyderabad and Dr Amit Acharyya, Associate Professor, Department of Electrical Engineering. As a proof of concept demonstration, the researchers have taken healthy and various unhealthy cases from the Physionet database to validate the proposed method. Their research has been published recently in the peer-reviewed international journal Scientific Reports, an online open access, scientific journal published by prestigious Nature Research.
Speaking about the importance of this research, Dr Amit Acharyya said, "CVD is one of the deadliest disease and irrespective of the economy of the country people are getting affected by it. It is manifested in different forms necessitating the early diagnosis, therapy and prognosis. Hence the proposed work on the classification is going to be of immense help for the society."
In addition, they also worked on developing different classification techniques and integrating them to make a generic algorithm. A novel System-On-Chip (SoC) architecture is developed in a low complex way by resource sharing concept for the CVD automation. Thus the whole system can cover various ECG abnormalities and finally come up with the prototype board which looks similar to as a smartphone at the patient end.
Speaking about their plans to take this research to benefit the society at large, Vemishetty Naresh said, "There is an exponential increment in human mortality rate, due to the delayed diagnosis, lack of proper distribution of health care facilities and prognosis centers in the vicinity. There is a need of a robust automated device for the early detection of the vital abnormal ECG signals in chronic CVD patients."
This medical science and technological needs impose many challenges on such device development such as low power consuming system design tradeoff between the on-board processing and RF (Radio Frequency) communication, low complexity analog front-end circuit design and energy harvesting or self-power mechanism to prolong battery life. Further, there is great necessity to develop a robust algorithm to find any desynchronisation in the ECG waves. With the present advancement in technology, there is a great scope for developing robust medical ECG devices in analysing the ECG signals and classify the patient condition. This method will predict the departure from the healthy condition to unhealthy condition corresponding to the CVDs.
How does the system work?
The researchers overcame the above mentioned challenges by proposing a novel System-on-Chip (SoC) architecture for CVD monitoring. Scrutinising the technical challenges like low-power and low-area for delivering reliable healthcare under resource constraints, they have proposed low-complex Boundary Detection (BD) and Feature Extraction (FE), low-complex f-QRS Detection and Morphology Identification (FDMI) architecture, Rule Engine (RE), and Token based compression technique. The aim of the researchers is to take this idea further to the system level from the concept and propose a low-complexity but medically reliable SoC architecture.
The above proposed methodologies are used to extract the essential clinical features from each ECG beat and compared with the standard values to give the binary classification as normal or abnormal. Many research articles had put thrust on studying the clinical features of ECG beats and the heart rate variability for the diagnosis. Despite these findings, it is difficult to derive an equivocal temporal relationship of these methodologies to predict arrhythmias. The prediction of ECG abnormalities associated with the change of morphology in the localised features (PR interval, QRS complex, QT interval) will allow the clinicians sufficient time to intervene to stop its escalation causing sudden cardiac death.
"To mitigate the above limitations our attempt in this thesis is to propose a generalised Phase Space Reconstruction (PSR) based detection and classification of the CVD by exploiting the localised features of the ECG unlike the state-of-art PSR techniques," said one of the researchers. Since the aim was to do the real-time ECG classification on an edge-device that is running under resource constrained environment with scarcity of power and area, therefore the idea of the researchers was to propose a low-complexity yet accurate solution and therefore they adopted classical technique of localised features detection.
This research was partly supported by Department of Science and Technology (DST), Government of India under the ‘Internet of Things (IoT) Research of Interdisciplinary Cyber Physical Systems (ICPS) Programme,' with the Project entitled ‘IOT Based Holistic Prevention and Prediction of CVD (i-PREACT).’